Digital Logic Design Project
- Smart Traffic Light Controller -
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- Specification of STLC
- I/O signal de½ºÅ©¸³Æ®ion
- Block diagram of system
- State diagram
- Verilog HDL source code
- Test plan & Result
- Simulation results in waveform
- Conclusions & Comments
1. Specification of STLC
- Local road¿¡ Â÷°¡ ¾ø°Å³ª °Ç³Î¸ñÀ» °Ç³Ê·Á´Â º¸ÇàÀÚ°¡ ¾ø´Â °æ¿ì, highwayÀÇ ½ÅÈ£°¡ greenÀ» °è¼Ó À¯ÁöÇÑ´Ù
- Local road¿¡ Â÷·®ÀÌ °¨ÁöµÇ¸é, high way greenÀÌ 60ÃÊ(LT) ÀÌ»ó Áö¼ÓµÈ °æ¿ì highway ½ÅÈ£¸¦ yellow(10ÃÊ, ST) -` red·Î, local road ½ÅÈ£¸¦ greenÀ¸·Î ¹Ù²ãÁÖ¸ç, Â÷·®ÀÌ ÀÖ´Â µ¿¾È¸¸ ÀÌ »óŸ¦ À¯ÁöÇÑ´Ù.
- Local road¿¡ Â÷·®ÀÌ °è¼Ó ÀÖ´õ¶óµµ local road greenÀÌ 60ÃÊ(LT)°£ Áö¼ÓµÇ¾ú´Ù¸é, local road ½ÅÈ£´Â yellow -` red·Î ¹Ù²î°í, highway ½ÅÈ£´Â greenÀ¸·Î ¹Ù²ï´Ù.
- º¸ÇàÀÚ°¡ ¹öÆ° P¸¦ ´©¸£¸é, highway greenÀÌ 60ÃÊ ÀÌ»ó Áö¼ÓµÈ °æ¿ì highway ½ÅÈ£¸¦ yellow -` red ·Î º¯°æÇÏ°í, º¸ÇàÀÚ ½ÅÈ£¸¦ green À¸·Î ¹Ù²Û ÈÄ¿¡ 60ÃÊ¡¦(»ý·«)
2. I/O signal de½ºÅ©¸³Æ®ion
3. Block diagram of system
4. State diagram
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